Field of the Disclosure
Embodiments of the present disclosure generally relate to the manufacture and processing of semiconductor wafers, and more particularly to methods for keeping the surface of a wafer flat following deposition to improve lithography, planarization, and other process steps that benefit from a more perfectly flat wafer.
Description of the Related Art
Semiconductor manufacturing is typically performed on the flat surface of a substrate such as a crystalline silicon wafer, quartz wafer, glass or the like. Very often during processing, materials will be deposited or grown on the surface and to fill in surface features. Some deposition techniques, such as Atomic Layer Deposition (ALD), will fill small features very effectively, but on the wafer surface, will vary in thickness quite significantly from the center of the wafer to the edge.
When this happens, a circular crystalline silicon wafer can end up with a mound in its center. This mound shape will adversely affect subsequent processing steps such as etching, Chemical Mechanical Polishing, (CMP), lithographic exposures, to name a few. For example, when etching, the material deposited on the surface will be removed around the edges before it is removed in the center and, as a result, continuing the etch to clear the center area will cause over-etching of the features below the deposited material around the edges. In lithographic exposures, a domed wafer might be closer to the exposure source at the edges than at the center of the wafer resulting in focusing errors tor which corrections would have to be made. In a CMP process step, the edges of the wafer might polish more quickly than the center due to the center being protected by the dome of excess material in the center.
As such, there is a need in the art for a method of producing a flat wafer for further processing.